Error-detecting codes: parity and CRC

Detecting a transmission error: the parity bit and what it lets through, then the cyclic redundancy check, from the generator polynomial to the remainder of the modulo-2 division appended to the frame.

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A few cards from the deck

  • Redundancy: what is it?

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    Information added to the data, computable from it, which tells nothing new but lets an alteration be spotted.

    On reception, this information is recomputed and compared with the one received: if they differ, the frame was altered. Without it, no error shows.

  • How is the generator x³ + x + 1 written as a binary word?

    • 1011
    • 1101
    • 0111
    • 1110
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    1011

    Read the coefficients of x³, x², x and 1: 1, 0, 1, 1. 1101 is x³ + x² + 1, and 0111 leaves out the highest-degree term, which defines the polynomial.

  • An even-parity bit is chosen so that the number of 1s in the word is …; it detects any … number of flipped bits.

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    An even-parity bit is chosen so that the number of 1s in the word is even; it detects any odd number of flipped bits.

    A flipped bit turns an even count of 1s into an odd one: the receiver sees it. Two flips cancel out and go unnoticed.

  • Parity bit: what is it?

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    A bit added to a word so that its total number of 1s is even (even parity) or odd (odd parity).

    For 1011011, which has five 1s, the even-parity bit is 1 (reaching six) and the odd-parity bit is 0 (staying at five).