The memory hierarchy
From registers to the hard disk: capacity, speed, cost and volatility of each level, the cache's role, temporal and spatial locality, hits and misses, average access time.
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Memory hierarchy: what is it?
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A stack of memories, from small, very fast ones near the processor to large, slow ones far from it, that gives the impression of one memory that is both large and fast.
Going down: registers, L1 to L3 caches, main memory, SSD, hard disk. Each level is bigger, slower and cheaper per byte than the one above.
Why is walking through an array of integers in order fast?
- One read also brings the neighbouring cells into the cache
- An array is stored in the processor's registers
- Each cell is read only once, so no miss is possible
- The processor guesses the value before reading it
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One read also brings the neighbouring cells into the cache
This is spatial locality: the cache loads a whole line. A cell read for the first time can well miss, but the loaded line supplies the next ones. An array lives in main memory, not in registers.
When the data sought is in the cache, it is a …; otherwise, it is a cache ….
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When the data sought is in the cache, it is a hit; otherwise, it is a cache miss.
A miss costs an access to the level below: about a hundred nanoseconds for main memory, against one or two for the cache.
Cache memory: what is it?
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A small, very fast memory placed between the processor and main memory, which keeps a copy of recently used data.
It is managed by the hardware, without the program asking. The L1, L2 and L3 levels are ever larger and slower; L1 is closest to the core.