Registers and instruction set
A processor's registers, its flags Z, N, C and V, the families of instructions, how an instruction splits into an opcode and operands, and the difference between RISC and CISC.
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Register: what is it?
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A tiny memory inside the processor, with the shortest access time, where it keeps the values it is working on.
On a load-store processor such as ARM, an addition is done between registers, not directly in working memory: load the operands, compute, then store the result.
R0 holds 0x7FFFFFFF. Which flags are 1 after this instruction?
```arm
ADDS R0, R0, #1`- N and V
- Z and C
- N only
- V only
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N and V
The result is 0x80000000: the top bit is 1, so N = 1. Two positive signed integers gave a negative, hence V = 1. There is no carry out (C = 0) and the result is not zero (Z = 0).
After an operation, the … flag is 1 if the result is zero, the … flag if it is negative.
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After an operation, the Z flag is 1 if the result is zero, the N flag if it is negative.
Z stands for “zero”, N for “negative”. A comparison is a subtraction of which only the flags are kept: two equal values give Z = 1.
Program counter: what is it?
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The register that holds the address of the next instruction to run and moves forward with each instruction, unless a jump changes it.
A jump is nothing more than a write to this register. On 32-bit ARM it is R15; it is written PC.
A program adds two unsigned 32-bit integers and wants to detect that the sum does not fit. Which flag should it read just after the addition?
- V, the signed overflow
- C, the carry out
- N, the sign of the result
- Z, the zero result
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C, the carry out
For unsigned integers, a sum that does not fit produces a carry out. V only concerns the two's complement reading: 0xFFFFFFFF + 1 sets C but not V.